Magnetoresistive Random Access Memory (MRAM), based on the integration of silicon CMOS with MTJ technology, is a major emerging technology that is highly competitive with existing semiconductor memories such as SRAM, DRAM, Flash, etc. as presented by S. Tehrani et al. in “Progress and Outlook for MRAM Technology”, IEEE Trans. on Magn., Vol. 35, pp. 2814-2189 (1999). A MRAM device is generally comprised of an array of parallel first conductive lines on a horizontal plane, an array of parallel second conductive lines on a second horizontal plane spaced above and formed in a direction perpendicular to the first conductive lines, and a MTJ element interposed between a first conductive line and a second conductive line at each crossover location. A first conductive line may be a word line while a second conductive line is a bit line or vice versa. Alternatively, a first conductive line may be a bottom electrode that is a sectioned line while a second conductive line is a bit line (or word line). There are typically other devices including transistors and diodes below the array of first conductive lines as well as peripheral circuits used to select certain MRAM cells within the MRAM array for read or write operations. MTJ cells are typically inserted into the back end of a CMOS process. A high speed version of MRAM architecture consists of a cell with an access transistor and a MTJ (1T1MTJ) in the array.
A MTJ element may be based on a tunneling magneto-resistance (TMR) effect wherein a stack of layers has a configuration in which two ferromagnetic layers are separated by a thin non-magnetic dielectric layer. In a MRAM device, the MTJ element is formed between a bottom electrode such as a first conductive line and a top electrode which is a second conductive line. A MTJ stack of layers that is subsequently patterned to form a MTJ element may be formed in a so-called bottom spin valve configuration by sequentially depositing a seed layer, an anti-ferromagnetic (AFM) pinning layer, a ferromagnetic “pinned” layer, a thin tunnel barrier layer, a ferromagnetic “free” layer, and a capping layer. The AFM layer holds the magnetic moment of the pinned layer in a fixed direction. In a MRAM MTJ, the free layer has traditionally been made of NiFe because of its reproducible and reliable switching characteristics as demonstrated by a low switching field (Hc) and low switching field uniformity (σHc).
The pinned layer has a magnetic moment that is fixed in the “y” direction, for example, by exchange coupling with the adjacent AFM layer that is also magnetized in the “y” direction. The free layer has a magnetic moment that is either parallel or anti-parallel to the magnetic moment in the pinned layer. The tunnel barrier layer is thin enough that a current through it can be established by quantum mechanical tunneling of conduction electrons. The magnetic moment of the free layer may change in response to external magnetic fields and it is the relative orientation of the magnetic moments between the free and pinned layers that determines the tunneling current and therefore the resistance of the tunneling junction. When a sense current is passed from the top electrode to the bottom electrode in a direction perpendicular to the MTJ layers, a lower resistance is detected when the magnetization directions of the free and pinned layers are in a parallel state (“1” memory state) and a higher resistance is noted when they are in an anti-parallel state or “0” memory state.
In a read operation, the information stored in a MRAM cell is read by sensing the magnetic state (resistance level) of the MTJ element through a sense current flowing top to bottom through the cell in a current perpendicular to plane (CPP) configuration. During a write operation, information is written to the MRAM cell by changing the magnetic state in the free layer to an appropriate one by generating external magnetic fields as a result of applying bit line and word line currents in two crossing conductive lines, either above or below the MTJ element. One line (bit line) provides the field parallel to the easy axis of the bit while another line (digit line) provides the perpendicular (hard axis) component of the field. The intersection of the lines generates a peak field that is engineered to be just over the switching threshold of the MTJ.
A high performance MRAM MTJ element is characterized by a high tunneling magnetoresistive (TMR) ratio which is dR/R where R is the minimum resistance of the MTJ element and dR is the change in resistance observed by changing the magnetic state of the free layer. A high TMR ratio and resistance uniformity (Rp_cov), and a low switching field (Hc) and low magnetostriction (λs) value are desirable for conventional MRAM applications. For Spin-RAM (STT-RAM), a high λs and high Hc leads to high anisotropy for greater thermal stability. This result is accomplished by (a) well controlled magnetization and switching of the free layer, (b) well controlled magnetization of a pinned layer that has a large exchange field and high thermal stability and, (c) integrity of the tunnel barrier layer. In order to achieve good barrier properties such as a specific junction resistance×area (RA) value and a high breakdown voltage (Vb), it is necessary to have a uniform tunnel barrier layer which is free of pinholes that is promoted by a smooth and densely packed growth in the AFM and pinned layers. RA should be relatively small (<2000 ohm-μm2) for MTJs that have an area defined by an easy axis and hard axis dimensions of less than 1 micron. Otherwise, R would be too high to match the resistance of the transistor which is connected to the MTJ.
In MRAM MTJ technology, Rp is the MTJ resistance for free layer magnetization aligned parallel to pinned layer magnetization (which is fixed). Rap is the resistance of free layer magnetization aligned anti-parallel to the pinned layer magnetization. Uniformity of the TMR ratio and the absolute resistance of the MTJ cell are critical in the MRAM architecture since the absolute value of MTJ resistance is compared with a reference cell during read mode. If the active device resistances in a block of memory show a large resistance variation (i.e. high Rp_cov, Rap_cov), a signal error can occur when they are compared with a reference cell. In order to have a good read operation margin, TMR/Rp_cov (or TMR/Rap_cov) should have a minimum value of 12, and preferably >15, and most preferably a value>20.
The first MRAM product, Freescale's 4 Mb MR2A16A, was introduced in a publication “MRAM becomes standard product at Freescale”, EE Times, Sep. 24, 2004. The 4 Mb MRAM array configuration is made of CoFe/AlOx/NiFe (pinned/tunnel/free layer) and MTJ devices of 0.4×0.8 micron oval size are fabricated by using a 180 nm technology node. Until recently, such MTJ devices were made with AlOx tunnel barriers and a NiFe free layer to produce a TMR in the 40-50% range that works well in MRAM. The read margin for MRAM circuits, defined as TMR (0.4V biased)/Rp_cov is >20. TMR values well over 200% have been reported for a MTJ based on a CoFeB/MgO/CoFeB pinned/tunnel/free layer configuration by D. Djayaprawira et al. in “230% room-temperature magnetoresistance in CoFeB/MgO/CoFeB magnetic tunnel junctions”, Appl. Phys. Lett., 86, 092502 (2005). Unfortunately, these MTJ devices do not have the magnetic properties such as low magnetostriction (Xs) and low intrinsic anisotropy (Hc) needed for magnetic switching for MRAM circuits.
As the size of MRAM cells decreases, the use of external magnetic fields generated by current carrying lines to switch the magnetic moment direction becomes problematic. One of the keys to manufacturability of ultra-high density MRAMs is to provide a robust magnetic switching margin by eliminating the half-select disturb issue. For this reason, a new type of device called a spin transfer (spin torque) device was developed and described by J. Sloneczewski in “Current-driven excitation of magnetic multilayers”, J. Magn. Materials V 159, L1-L7 (1996). Compared with conventional MRAM, spin-transfer torque (STT)-RAM has an advantage in avoiding the half select problem and writing disturbance between adjacent cells. The spin-transfer effect arises from the spin dependent electron transport properties of ferromagnetic-spacer-ferromagnetic multilayers. When a spin-polarized current transverses a magnetic multilayer in a CPP configuration, the spin angular moment of electrons incident on a ferromagnetic layer interacts with magnetic moments of the ferromagnetic layer near the interface between the ferromagnetic and non-magnetic spacer. Through this interaction, the electrons transfer a portion of their angular momentum to the ferromagnetic layer. As a result, spin-polarized current can switch the magnetization direction of the ferromagnetic layer if the current density is sufficiently high, and if the dimensions of the multilayer are small. The difference between a STT-RAM and a conventional MRAM is only in the write operation mechanism. The read mechanism is the same.
In order for conventional MRAM and STT-RAM to be viable in the 90 nm technology node and beyond, MTJs must exhibit a TMR ratio that is much higher than in a conventional MRAM-MTJ which uses AlOx as the tunnel barrier and a NiFe free layer. For example, a higher TMR ratio of >80% is achieved in an unpatterned MTJ with a CoFeB/MgO/NiFe configuration according to J. Slaughter et al. in “High speed toggle MRAM with MgO-based tunnel junctions”, IEEE IEDM, p. 35.7.1-3 (2005). However, testing of MRAM circuits having MTJs of 0.26 μm×0.52 μm (oval) bit size has shown a read margin TMR (0.35V)/Rp_cov=12 which is far short of Freescale's 4 Mb MRAM that has a read margin>20.
A critical current for spin transfer switching (Ic), which is defined as [(Ic++Ic−I)/2], for the present 180 nm node sub-micron MTJ having a top-down area of about 0.2×0.4 micron, is generally a few milliamperes. The critical current density (Jc), for example (Ic/A), is on the order of several 107 A/cm2. This high current density, which is required to induce the spin-transfer effect, could destroy a thin tunnel barrier made of AlOx, MgOx, or the like. In order for spin-transfer magnetization switching to be viable in the 90 nm technology node and beyond, the critical current density (Jc) must be lower than 106 A/cm2 to be driven by a CMOS transistor that can typically deliver 100 μA per 100 nm gate width. To apply spin-transfer switching to MRAM technology, it is desirable to decrease Ic (and its Jc) by more than an order of magnitude so as to avoid an electrical breakdown of the MTJ device and to be compatible with the underlying CMOS transistor that is used to provide switching current and to select a memory cell. A means to improve the dielectric breakdown voltage is also an important consideration.
The intrinsic critical current density (Jc) as given by Slonczewski of IBM is shown in equation (1) below.Jc=2eαMstF(Ha+Hk+2πMs)/hη  (1)where e is the electron charge, α is a Gilbert damping constant, tF is the thickness of the free layer, h is the reduced Plank's constant, η is the spin-transfer efficiency which is related to the spin polarization (P), Ha is the external applied field, and Hk is the uniaxial anisotropy field, and 2π Ms is the demagnetization field of the free layer.
Normally, the demagnetizing field, 2π Ms (several thousand Oe term) is much larger than the uniaxial anisotropy field Hk and external applied field (approximately 100 Oe) Ha term, hence the effect of Hk and Ha on Jc are small. In equation (2), V equals Ms(tFA) and is the magnetic volume which is related to the thermal stability function term KuV/kbT where Ku is the magnetic anisotropy energy and kb is the Boltzmann constant.Jc∝αMsV/hη  (2)
Other publications in the prior art relating to STT-RAM structures include the following: M. Hosomi et al. in “A novel non-volatile memory with spin torque transfer magnetization switching: Spin-RAM”, 2005 IEDM, paper 19-1; J. Hayakawa et al. entitled “Current-driven magnetization switching in CoFeB/MgO/CoFeB magnetic tunnel junctions”, Japn. J. Appl. Phys. V44, p. 1267 (2005); and Y. Huai et al., “Spin transfer switching current reduction in magnetic tunnel junction based dual spin filter structures”, Appl. Phys. Lett. V 87, p. 222510 (2005). A Jc>2×106 A/cm2 for a CoFe(B)/MgO/CoFeB MTJ of sub-100 nm size is reported but is too high to be acceptable for a STT-RAM application.
In other prior art references, U.S. Patent Application Publication No. 2005/0184839 teaches ferromagnetic doping and/or non-magnetic dilution of the free layer to provide low saturation magnetization for STT-RAM applications.
U.S. Pat. No. 6,649,960 describes a synthetic anti-ferromagnetic free layer made of two ferromagnetic layers that are anti-ferromagnetically coupled to reduce the effective free layer thickness and thereby lower the switching field in a MRAM cell.
Further improvement in MRAM and STT-RAM technology is necessary before a viable product based on the 90 nm technology node is achieved. In particular, a combination of a high TMR ratio, TMR/Rp_cov ratio>15, and a low Jc of less than 2×106 A/cm2 are desirable.